Power supply circuitry having base drive inhibit control

ABSTRACT

A D.C. power supply circuit having a series semiconductor for supplying energizing current to a load in accordance with base drive current supplied thereto from a drive circuit. Base drive inhibiting means are interposed between the semiconductor and the base drive circuit for inhibiting base drive current as the output voltage decreases in magnitude below a desired level. Circuitry is also employed for controlling the drive means to alternately turn on and turn off the semiconductor means acting as a series switch in a switching regulator circuit, and output circuitry serves for providing clock pulses at a frequency dependent upon the switching frequency of the semiconductor means.

United States Patent [191 Kime, Jr.

' 1 1 POWER SUPPLY CIRCUITRY HAVING BASE DRIVE INHIBIT CONTROL [75]Inventor: Robert Clarence Kime, Jr., Fairview [52] U.S. Cl. 323/22 T,307/80, 307/260, 317/31, 320/13, 323/4, 323/20, 323/DIG. l [51] Int. Cl.G05f 1/58 [58] Field of Search i. 307/17, 33, 34; 317/33 VR, 317/31;321/2, 18; 323/9, 22 T, 38, DIG. 1

[56] References Cited Grossoehme 323/22 T Farnsworth et al 323/D1G. 1

Primary ExaminerA. D. Pellinen [57] ABSTRACT A DC. power supply circuithaving a series semiconductor for supplying energizing current to aloadin accordance with base drive current supplied thereto from a drivecircuit. Base drive inhibiting means are interposed between thesemiconductor and the base drive circuit for inhibiting base drivecurrent as the output voltage decreases in magnitude below a desiredlevel. Circuitry is also employed for controlling the drive means toalternately turn on and turn off the semiconductor means acting as aseries switch in a switching regulator circuit, and output circuitryserves for providing clock pulses at a frequency dependent upon theswitching frequency of the semiconductor means.

5 Claims, 2 Drawing Figures UNITED STATES PATENTS 3,643,153 2/1972Hanson et a1. 323/22 T 3,104,353 9/1963 Theobald 317/33 VR 3,381,2024/1968 LOUCkS et 8.1. 321/2 82 2 o, .z. 8.4 FULL QSm/E 3 i RECZ i i w:n'

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POWER SUPPLY CIRCUITRY HAVING BASE DRIVE INHIBIT CONTROL This inventionrelates to improvements particularly applicable for use in a seriesvoltage regulator, such as a switching regulator, and will be describedwith particular reference thereto; although, the invention may beemployed in other electrical circuits.

Series voltage regulator circuits typically employ a regulatingsemiconductor which is connected in series with a voltage source tosupply energy to a load. If the source voltage decreases in magnitudethe regulating circuitry may operate upon the semiconductor to increasethe current flow therethrough to maintain a regulated output voltage.Depending on the type of circuitry and components employed, severeincreases in current flow through the semiconductor may result in powerdissipation at the semiconductor,-resulting in generated heat. This maydamage or possibly destroy the semiconductor. Where the voltage sourceis obtained from batteries, the increased current flow will further loadthe battery so that its voltage decreases still further as energy iswithdrawn. If this condition continues, the loading may becomedestructive. For example, if the batteries include typical alkaline,nonrechargeable batteries, then as the source voltage decreases theregulator will tend to increase the current flow through thesemiconductor. This causes additional energy to be withdrawn from thebatteries and the internal resistance of the alkaline cells willincrease. This generates heat which may cause the battery cells tobreak, resulting in battery leakage or venting. Not only will thebattery be of no use upon venting, the vented corrosive chemicals maydamage the power supply circuitry. If rechargeable nickel cadmiumbatteries be employed, then at least one cell in a multiple cell batteryarrangement may discharge to a level such that the cell will becomenegatively charged by energy received from the adjacent cells. Once sucha rechargeable cell has been reverse charged, its capability to receivea normal charge has been reduced and, hence, that cell will not operateefficiently. Consequently, it is desirable that such power supplycircuits employing a series semiconductor, or the like, be provided withcircuitry for inhibiting the conductivity of the semiconductor whennecessary to prevent damage to the batteries.

In addition to protecting the batteries in such a circuit, it is alsodesirable to prevent damage to the series regulating semiconductor. Forexample, if the source voltage drops sufficiently that the regulatingcircuitry cannot maintain the output voltage at the desired regulatedlevel, then the regulating circuitry tends to maintain the semiconductorin a conductive state so that current will continue to be drawn from thebattery supply. If the current attains a magnitude sufficient tosaturate the transformer, as in a switching regulator, then a voltagedrop will occur across the semiconductor causing power dissipation andthe accompanying generation of heat. This, of course, may severelydamage if not destroy the semiconductor. It is therefore desirable insuch series regulator circuits to provide circuitry for inhibiting thebase current drive to the semiconductor device as the circuitry sensesthat the input voltage of the source has decreased to the point that theregulated output voltage cannot be maintained.

Regulated power supply circuits are typically employed to provideregulated DC. voltage for such electrical instrumentation asanalog-to-digital converters which employ counters for counting clockpulses. If the regulated power supply circuit includes oscillator typecircuitry, as in the case of a switching regulator, then the resultantfrequency signal may beat against the clock source, resulting in adegradation in the accuracy of the digital counting function. It wouldbe desirable that circuitry be employed so that the frequency signal ofthe power supply be utilized to provide a train of clock pulses for theanalog-to-digital converter.

The present invention is directed toward improvements in power supplycircuitry for satisfying the foregoing needs.

Consequently, it is an object of the present invention to provide in aseries regulating power supply circuit, means for controlling theconductivity of the series semiconductor so as toinnibit current flowtherethrough when the regulated output voltage cannot be sustained bythe regulating circuitry.

It is a still further object of the present invention to provideprotective circuitry particularly applicable for use with a seriesregulated power supply circuit for minimizing battery drain upondetection of low battery voltage to thereby protect against reversecharging a chargeable nickel cadmium battery or to prevent venting of aconventional alkaline battery.

It is a still further object of the present invention to provide aprotective circuit particularly applicable for use with a seriesregulated circuit to protect the series semiconductor from damage due toexcessive power dissipation resulting from low source voltageconditions.

To achieve the foregoing objectives, the invention provides thatenergizing current be supplied to a load circuit through a semiconductorhaving its emittercollector circuit connected in series with a DC.voltage source, and driven by a driving circuit which serves to providebase drive current flow so as to control the conductivity of thesemiconductor. Protective circuitry is employed, including base driveinhibiting circuitry including a second semiconductor having itsemittercollector circuit connected in series with the emitterbasecircuit of the first semiconductor. The second semiconductor iscontrolled in its level of conductivity in dependence upon the magnitudeof the output voltage of the load circuit in such a manner that the basedrive current for the first semiconductor is inhibited as a function ofdecreases in the load circuit output voltage below its desired level.

Still further in accordance with the present invention, the conductivitylevel of a semiconductor connected for supplying energizing current froma voltage source to a load circuit is controlled by a base-drivecircuit. Additional circuitry is employed to provide a train of clockpulses exhibiting a frequency in dependence upon the switching frequencyof the semiconductor as it is being switched between on and offconditions by the drive circuit under the control of a switch controlcircuit.

The foregoing and other objects and advantages of the invention willbecome more readily apparent from the following description of thepreferred embodiment of the invention as taken in conjunction with theaccompanying drawings which are a part hereof and wherein:

FIG. 1 is a schematic illustration of a series regulating circuitemploying the present invention; and,

FIG, 2 is a combined schematic-block diagram illustration of the seriesregulating circuit connected for supplying regulated output voltage andclock pulses to an analog-to-digital converter.

Referring now to the drawings wherein the showings are for purposes ofillustrating a preferred embodiment of the invention only and not forpurposes of limiting same, FIG. 1 illustrates a, DC. voltage regulator,of the series switching type, employing the present invention. It is tobe appreciated, however, that the invention may be employed inconjunction with other series regulating circuits which may or maynottake the form of switchingregulators. The disclosed switchingregulator is illustrated and described in greater detail in a copendingU.S. Pat. application Ser. No. 210,999 filed on Dec. 22, 1971, in thename of Adrian Paul Brokaw and assigned to the same assignee as thepresent invention. That switching regulator serves to provide regulatedB+, C and ground potential at its output terminals from an unregulatedinput D.C. voltage V,. The input voltage V,, as taken across a smoothingcapacitor 10, is obtained from either a battery supply or a rectifiedAC. voltage source. Briefly, the regulator circuit includes a seriesswitch S which serves to supply energizing current from the inputvoltage V to the primary winding 12 of an inductor-transformer L duringthe time that switch S is on. When the switch is turned off, energy isreleased from the inductor-transformer from both the primary winding 12and the secondary winding 14 so that current flows to charge loadcapacitors l6 and 18, across which the regulator 3+ and C voltages arerespectively obtained. Diodes and 22 are respectively connected in theseries charging circuits of capacitors 16 and 18 to prevent energytransfer to the capacitors, except when switch S is off. Switch S isalternately turned on and off under the control of a switch controlcircuit CC which alternately provides turn on and turn off signals inaccordance with sensed input and loading conditions. These turn on andturn off signals are relayed to switch S by means of a switch drivencircuit SD so that the ratio of switch on time to switch off time iscontrolled in a manner to maintain the regulated output voltages.

Switch S preferably includes at least one semiconductor. As shown inFIG. 1, there is provided a pair of PNP transistors 30 and 32 havingtheir emittercollector circuits connected in parallel and their baseelectrodes being connected together in common. A base drive resistor 34is connected between the commonly connected emitters and the commonlyconnected base electrodes. The level of conductivity of switch S isdetermined by the base drive current flow for the switching transistorsas provided by a switch driver NPN transistor 35 having its collector toemitter circuit connected to the commonly connected base electrodes ofthe switching transistors. Transistor 35 is, in turn, driven by atransistor 36 which is directly controlled by the switch control circuitCC. Transistors 35 and 36 are connected in a typical Darlington arrangement with the collector of transistor 36 being referenced to thepositive bias supply line 38 obtained from the positive terminal ofasmoothing capacitor 10. Consequently, whenever the bias control lineswitch 40 is closed, operating potential is available for operating theswitch driver circuit. Whenever the switch control circuit CC provides aturn on or positive signal, transistor 36 is biased into conduction soas to, in turn, drive transistor 35 into conduction so that a base drivecurrent is provided through a path from the emitter to base electrodesof the switching transistors and, thence, through the collector toemitter circuit of transistor 35 and through a series resistor 42 toground. The base drive is normally sufficient to operate the switchingtransistors 30 and 32 is a saturated state.

The switch control circuit provides the turn on and turn off signals tothe switch driver circuit SD in dependence upon the input signalsapplied to the control circuit as taken from an inductor-transformermonitoring circuit M, a load monitoring circuit LM and a negativereference source R. The specific circuitry employed and the details ofoperation are set forth in the afore said United States applicationtiled in the name of Adrian Paul Brokaw. Briefly, the monitoring circuitM employs a pair of resistors 50 and 52 which are respectively connectedin series with the primary winding 12 and the secondary winding 14. Thevoltages developed across these two resistors are proportional to thecurrents flowing through the respective windings and these voltages areapplied to the switch control circuit. The load monitoring circuit LMemploys a pair of series connected resistors 54 and 56 connected betweenthe 8+ and C output terminals, with the midpoint between the tworesistors being connected to the switch control circuit for comparisonwith the reference voltage obtained from the reference source R. Theratio of switch on to switch off time is then controlled in dependenceupon such factors. as the level of the input voltage V and the loadingpresented to the 8+ and C- terminals. As the regulated output voltageterminals are loaded the ratio of switch on time to switch off time willbe increased, tending to increase the period of conductivity of theswitching transistors 30 and 32 so that the current flow through theswitches during the switch on time will continue to increase inmagnitude so long as the current does not reach itssteady state level,or until the inductor-transformer saturates.

Severe loading conditions, such as a short circuit or a severe decreasein the input voltage V would normally result in a longer switch on time.If this condition is permitted to continue, the inductor-transformer Lmay saturate at which time a substantial voltage drop will result acrossthe switching transistors. This, of course, will result in substantialpower being dissipated across the transistors andthis will result ingeneration of heat, tending to severely damage if not destroy theswitching transistors.

If the input voltage is obtained from a battery source, continuedbattery drain as the switching transistors remain on may result. Forexample, if the batterysource includes a plurality of series connected,recharge able, nickel cadmium batteries, then as energy is withdrawnfrom the batteries one of the cells may discharge to a zero voltagecondition and commence receiving energy from the other series connectedbatteries in a direction opposite to the charging direction so as tobuild up a negative voltage. In such case, the reverse charge will causebuild up of an internal pressure and reduce the batterys capacity toreceive a full charge during subsequent recharge operation.Consequently, if such a battery is permitted to discharge to the pointthat it receives a negative charge, its capacity to be fully rechargedhas been reduced. As a typical alkaline, nonchargeable battery ages, itsinternal resistance increases resulting in generated heat. If thiscondition continues, it would conceivably result in breakage of thebattery seal causing battery leakage or venting. The corrosive chemicalsdischarged may damage the circiutry in the vicinity of the batterycells.

In accordance with the present invention, a low voltage cutout circuitserves to inhibit the base drive to the switching transistors 30 and 32whenever the B+ ouput voltage cannot be sustained by the regulatingcircuitry, such as upon aging of the batteries or a short circuit acrossthe load terminals. The base'drive is continuously inhibited in aregenerative fashion as the output voltage decreases until there isinsufficient base drive to maintain transistors 30 and 32 in aconductive state.

The low voltage cutout protective circuitry preferablyemploys asemiconductor, such as a NPN transistor 60, in the base drive circuitbetween the switching transistors and the switch driver circuit SD. Asshown in FIG. 1, the NPN transistor 60 has its collector to emittercircuit connected between the base electrodes of the switchingtransistors 30 and 32 and the collector of transistor 35 in the switchdriver circuit SD. During start up of the voltage regulator, switch 40is closed to provide operating potential for the switch driver circuitSD and the switch control circuit CC. This also provides a path forcurrent to flow through capacitor 62 and resistor 64 to drive transistor60 into conduction. The time constant of capacitor 62 and resistor 64 issufficiently long that the regulating circuit will have sufficient timeto bring the output voltages substantially up to the regulated 3+ and C-values. This base drive for transistor 60 is sufficient to maintain thistransistor in a saturated state so that it does not affect the operationof the base drive from transistor 35 to the switching transistors 30 and32. Once capacitor 62 is fully charged, transistor 60 is maintained inits saturated state by the base drive afforded through diode 66 andresistor 68 connected in a forward direction from the B+ output terminalto the base electrode of transistor 60. This base drive path continuesto maintain transistor 60 saturated so that it provides a low impedancepath in the base drive circuit for the switching transistors.

With transistor 60 being in a saturated state, the impedance presentedto the base drive for the switching transistors 30 and 32 is essentiallynegligible. Consequently, the switch control circuit CC operates toalternately provide turn on and turn off signals to the switch drivercircuit SD and transistor 35 periodically provides base drive flowsufficient that the switching transistors 30 and 32 are periodicallyconductive in a saturated state. In normal operation, as the inputvoltage V decreases, or as the output voltage decreases, the switchcontrol circuit CC functions to increase the ratio of switch on time toswitch off time. This causes an increase in the amount of currenttransmitted through the switching transistors to theinductor-transformer L to increase the amount of energy stored thereinfor transfer to the load circuits to sustain the regulated outputvoltages at their desired 8+ and C levels. However, a severe loadingcondition or battery discharge may result in a condition wherein theregulating circuitry cannot sustain the output voltage at a levelapproaching that of the desired B+ and C- levels. Consequently, theswitching transistors will remain on for. a longer period of time,causing more current to be drawn from the voltagesource. This conditionis sensed by diode 66 and resistor 68 in that as the output voltagefalls, and cannot be sustained at the 13+ level, there will be adecrease in the base drive current provided through the diode andresistor to transistor 60. Consequently, transistor 60 will no longer besaturated and will present an increased impedance to inhibit the basedrive to the switching transistors. The switching transistors will tendto transmit less current, even though the switching regulator hasattempted to operate upon the transistors to provide more current andthe output voltage will continue to decrease in magnitude. Thisoperation is regenerative and diode 66 and resistor 68 continue to sensethe decreasing output voltage to further reduce the base drive totransistor 64 This operation will continue until the impedance presentedby transistor 60 is sufficient that there will be insufficient basedrive to maintain transistors 30 and 32 in a conductive state. Torestart the regulating circuit, the control switch 40 must now be openedso that capacitor 62 will be permitted to discharge through theregulating circuit. Upon reclosure of the switch, the initial currentflow through the capacitor will function to drive transistor 60 intoconduction in the manner described herein-before.

The voltage V, to operate the regulating circuit may be obtained fromeither a battery source or from a rectified D.C. source. The batterysource B may take the form, for example, of six series connected, onecell, nickel cadmium batteries each exhibiting a voltage rating on theorder of 1.2 volts. A diode 70 is interposed between the batteries andthe smoothing capacitor 10 to prevent damage to the batteries and theregulating circuit in the event that the batteries are connectedbackward. In the event the power supply circuit is employed in aportable battery powered instrument, such as a voltmeter, the batteriesB may remain in place, as shown by the schematic illustration of FIG. 1.Provisions are made, however, to obtain the input voltage V, from anA.C. source 80. In such case, the A.C. source is rectified as with afull wave rectifier 82 to provide a positive output terminal 84 and aground output terminal 86 and a charging terminal 88. To accomplish battery charging, the charging terminal 88 is connected through a diode 90to the regulating circuitry. so that charging current may be applied inthe proper direction to batteries B. So that the batteries are not usedwhen the A.C. source is connected, it is preferred that the maximumbattery voltage be less than the rectified voltage on output terminal84. For example, the maximum battery voltage may be on the order of 9volts and the A.C. rectified voltage at terminal 84 may be on the orderof 12 volts. The circuitry also includes another diode 92 having itscathode connected in common with that of diode '70. Thus, with the A.C.rectified source connected, diode 92 will reverse bias diode 70 so thatcurrent will not be drawn from battery B. Additionally, diode 92prevents damage to the instrument in the event that output terminals 84and 86 are reversed when connected to the regulating circuit.

The regulating power supply provides 8+ and C- regulated outputvoltages. The B+ voltage may be on the order of +5 volts and the C-voltage may be on the order of -l 2 volts. During the operation of theswitching regulator, the switching transistors 30 and 32 turn on and offthrough the switch driver SD in response to alternate turn on and turnoff signals provided by the switch control circuit CC. In accordancewith the invention, clock pulses are provided at this switchingfrequency with the clock pulses alternating between the 8+ and C-levels. To achieve this, a PNP transistor 100 is connected such that itsemitter is referenced to the 8+ output terminal and its collector isconnected through a resistor 102 to the C- terminal. Clock pulses areobtained from the collector of transistor 100 as the transistor isturned on and off through its base drive circuit which is referenced toa point imtermediate the secondary winding 14 and diode 20 through abase drive current control resistor 104. Capacitor 106 is connected inparallel with resistor 104 to decrease the rise and fall times of thebase drive signal. As shown in FIG. 2, this train of clock pulses may beemployed with an analog-to-digital converter circuit requiring a sourceof clock pulses as well as a regulated power supply circuit.

As shown in FIG. 2, the related power supply circuit of FIG. 1 receivesDC. voltage from a voltage source V which, as described hereinbefore,may be obtained from a battery source B or by rectifying an A.C. source80. The power supply circuit provides ground potential, C- potential and8+ potential. In addition, the regulated power supply provides a trainof clock pulses having a frequency dependent on the switching frequencyof the series switch in the regulating circuitry. The analog-to-digitalconverter AD employs a pair of operational amplifiers 110 and 120 whichreceive operating 8+ and C- potential from the power supply as well asthe clock pulses for counting purposes. A more detailed description ofthe analog-to-digital converter and its mode of operation is found inthe copending US. application Ser. No. 186,006, filed on Oct. 4, 1971 inthe names of S. Kurtin, M. Anthony, and W. Watrous, and assigned to thesame assignee as the present invention. Briefly, converter AD serves toconvert an input voltage V to digital pulses which are utilized by atotal pulse counter T and a discharge pulse counter T to provide anindication as to the magnitude of the input'voltage.

The input voltage V is applied to an integrating circuit l whichincludes operational amplifier 110 having its non-inverting inputreferenced to ground and an integrating capacitor 112 connected betweenthe inverting input and the amplifiers output circuit. The invertinginput of the amplifier, which serves as a summing point is connectedthrough a resistor 114 to receive the input voltage V The output signalfrom the integrator l is applied to the inverting input of amplifier 120serving in the capacity of a level detector for comparing the integratedoutput signal with a reference, such as ground potential. As theintegrated output signal becomes more negative relative to ground, itwill reach a point where the level detector 120 will provide a positiveoutput signal. This signal is applied to a clock enabled .lK flip-flopFF-l. The JK flip-flop has two inputs J and K and two outputs Q and 6and a set terminal for receiving clock pulses from the regulated powersupply circuit. Whenever the output of the level detector 120 goespositive, a positive or binary 1 signal is applied to the input terminal.I and by means of an inverter amplifier 122 a binary signal is appliedto input terminal K. Once a clock pulse is applied to the set terminalthese input conditions are respectively present at the output terminals0 and 6 so that output terminal Q carries a binary 1 signal and output Qcarries a binary 0 signal. A binary 0 signal from the Q output terminalserves to close a switch 1124 and present a negative constant currentcource 126 to the summing point of the integrator. Consequently, energyis withdrawn from capacitor 112 until the switch is reopened.

When the integrators output becomes positive relative to that applied tothe noninverting input of the level detector 120, the level detectorwill change state to provide a negative or binary 0 signal. The binary 0signal is applied to the J input terminal and by means of inverteramplifier 122 a binary 1 signal is applied to input terminal K. When theflip-flop is next enabled by a clock pulse from the regulated powersupply source, these signals will be present on the Q and 6 outputterminals of the flip-flop. The binary 1 signal obtained from the 6output terminal will open switch X24.

During the time that switch 124 is closed to withdraw energy fromcapacitor 112, output terminal 0 of flipflop FF-l carries a binary lsignal. This enables an AND gate 128 so that clock pulses may be passedby the AND gate to the discharge counter T During the operation of theanalog-to-digital converter AD the total pulse counter T will count apredetermined number of clock pulses while the discharge pulse counter Twill count only those clock pulses occurring during the times thatswitch 124 is closed. The relationship between the number of pulsescounted by counter T and those counted by counter T is related to themagnitude of the voltage V It is to be noted that the frequency ofoperation of the level detector 120 will in this circuit be dependentupon the integrated output signal level, as well as the occurrence ofclock pulses. Consequently, output signal pulses obtained from thispoint or, for that matter, from the output terminal Q of flipflop FF-lwill exhibit a frequency related to the voltage V X to thereby obtain avoltage to frequency converter. It is to be specifically noted that theclock pulses are obtained from the switching regulator, as opposed froma separate source of clock pulses. Consequently, the power supply isautomatically synchronized with the clock pulses as opposed to thetypical case wherein clock pulses are obtained separately from the powersupply and wherein such clock pulses may beat against theoscillations ofthe power supply circuit.

From the foregoing description it is evident that the present inventionemploys circuitry, such as transistor and its associated components, forinhibiting the base drive to the switching transistors 30 and 32 inresponse to low voltage conditions resulting from severe loading or alow battery voltage. If desired, the regulating circuitry may take theform of a typical series regulator as opposed to the disclosed switchingregulator. Where a switching regulator is employed, the presentinvention also provides circuitry, such as transistor and its associatedcomponents, for providing a train of clock pulses which may beadvantageously utilized with an analog-to-digital converter associatedwith the power supply circuit. However, analog-to-digital converters orvoltage to frequency converters other than that as shown in FIG. 2 maybe employed.

The invention has been described with reference to a preferredembodiment, however, it is to be appreciated that the invention isnot'limited to same as various modifications may be made withoutdeparting from the spirit and scope of the invention as defined in theap- I means for supplying energizing current to said load cir-' cuit toobtain a load output voltage and including first transistor means havingits emitter-collector circuit connected in series with a DC. voltagesource for supplying energizing current therethrough to said loadcircuit, drive means for providing base drive current flow forcontrolling the conductivity of said first transistor means, base driveinhibiting means including second transistor means having itsemitter-collector path interposed between said drive means and saidfirst transistor and connected in series with the emitter base circuitof said first transistor and circuit means for varying the conductivityof said second transistor means for presenting an increasingly higherimpedance path to said base drive current as said output voltagedecreases below a desired level, bias voltage supplying circuit meansincluding switching means for supplying bias voltage from said voltagesource through said switching means to said drive means to render sameoperative when said switching means is closed, and turn on circuit meansconnected to said bias voltage supply circuit means for supplying a turnon signal to the base of said second transistor means to provide aninitial low impedance path to said base drive current when said drivermeans is operative to provide said base drive current 2. An electricalcircuit as set forth in claim 1 wherein said controlling circuit meansincludes base drive circuit means connecting the output load circuitwith the base of said second transistor means in such a manner that assaid output voltage decreases in magnitude said base drive circuit meanstends to turn said second transistor means off.

3. An electrical circuit as set forth in claim 2 wherein said base drivecircuit means includes a diode and a resistor connected together in aseries circuit between the output load circuit and the base of saidsecond transistor means.

4. An electrical circuit as set forth in claim 1 wherein said turn oncircuit means includes delay means for delaying the supply of said turnon signal until said output voltage initially attains a'levelcorresponding with said desired level.

5. An electrical circuit as set forth in claim 4 wherein said delaymeans includes a capacitor connected together in series with a resistorbetween said switching means for supplying said bias voltage and thebase of said second transistor means.

1. An electrical circuit comprising a load circuit, means for supplyingenergizing current to said load circuit to obtain a load output voltageand including first transistor means having its emitter-collectorcircuit connected in series with a D.C. voltage source for supplyingenergizing current therethrough to said load circuit, drive means forproviding base drive current flow for controlling the conductivity ofsaid first transistor means, base drive inhibiting means includingsecond transistor means having its emitter-collector path interposedbetween said drive means and said first transistor and connected inseries with the emitter base circuit of said first transistor andcircuit means for varying the conductivity of said second transistormeans for presenting an increasingly higher impedance path to said basedrive current as said output voltage decreases below a desired level,bias voltage supplying circuit means including switching means forsupplying bias voltage from said voltage source through said switchingmeans to said drive means to render same operative when said switchingmeans is closed, and turn on circuit means connected to said biasvoltage supply circuit means for supplying a turn on signal to the baseof said second transistor means to provide an initial low impedance pathto said base drive current when said driver means is operative toprovide said base drive current flow.
 2. An electrical circuit as setforth in claim 1 wherein said controlling circuit means includes basedrive circuit means connecting the output load circuit with the base ofsaid second transistor means in such a manner that as said outputvoltage decreases in magnitude said base drive circuit means tends toturn said seCond transistor means off.
 3. An electrical circuit as setforth in claim 2 wherein said base drive circuit means includes a diodeand a resistor connected together in a series circuit between the outputload circuit and the base of said second transistor means.
 4. Anelectrical circuit as set forth in claim 1 wherein said turn on circuitmeans includes delay means for delaying the supply of said turn onsignal until said output voltage initially attains a level correspondingwith said desired level.
 5. An electrical circuit as set forth in claim4 wherein said delay means includes a capacitor connected together inseries with a resistor between said switching means for supplying saidbias voltage and the base of said second transistor means.